- Abstract:
-
It is our belief that future SOC devices will be overwhelmingly programmable, consisting of soft-programmable forms - as instruction set architectures, and hard-programmable forms - realised as field programmable logic. This paper explores an architectural structure which integrates them both in a micronet-based multithreaded architecture.
- Links To Paper
- .ps file
- Bibtex format
- @InProceedings{EDI-INF-RR-0515,
- author = {
D.K. Arvind
and S. Zhong
},
- title = {Hard- and Soft-Programmable, Multithreaded Micronet Architectures},
- book title = {Procs of 12th UK Asynchronous Forum},
- year = 2002,
- month = {Jun},
- url = {http://www.dcs.ed.ac.uk/home/dka/forum12.ps},
- }
|
