- Abstract:
-
The issue logic of a superscalar processor dissipates a large amount of static and dynamic power. Furthermore, its power density makes it a hot-spot requiring expensive cooling systems and additional packaging.
In this paper we present a novel software assisted approach to power reduction where the processor dynamically resizes the issue queue based on compiler analysis. The compiler passes information to the processor about the number of entries needed which limits the number of instructions dispatched and resident in the queue. This saves power without adversely affecting performance.
Compared with recently proposed hardware techniques, our approach is faster, simpler and saves more power. Using a simplistic scheme we achieve 47% dynamic and 31% static power savings in the issue queue with only a 2.2% performance loss. We then show that the performance loss can be reduced to less than 1.3% with 45% dynamic and 30% static power savings, outperforming all current approaches.
- Links To Paper
- 1st Link
- Bibtex format
- @InProceedings{EDI-INF-RR-0488,
- author = {
Timothy M. Jones
and Michael O'Boyle
and Jaume Abella
and Antonio Gonzlez
},
- title = {Software Directed Issue Queue Power Reduction},
- book title = {Proceedings of HPCA 2005 (International Symposium on High-Performance Computer Architecture)},
- publisher = {IEEE Computer Society},
- year = 2005,
- month = {Feb},
- pages = {144-153},
- url = {http://homepages.inf.ed.ac.uk/s0237688/hpca11.pdf},
- }
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