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Title:Proximity Coherence for Chip Multiprocessors
Authors: Nick Barrow-Williams ; Chris Fensch ; Simon Moore
Date:Sep 2010
Publication Title:Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques (PACT '10)
Publication Type:Conference Paper Publication Status:Published
Page Nos:123-134
DOI:10.1145/1854273.1854293 ISBN/ISSN:978-1-4503-0178-7
Many-core architectures provide an efficient way of harnessing the increasing numbers of transistors available in modern fabrication processes. While they are similar to multi-node systems, they exhibit different communication latency and storage characteristics, providing new design opportunities that were previously not feasible. Traditional cache coherence protocols, although often used in many-core designs, have been developed in the context of multinode systems. As such, they seldom take advantage of the new possibilities that many-core architectures offer. We propose Proximity Coherence, a scheme in which L1 load misses are optimistically forwarded to nearby caches via new dedicated links rather than always being indirected via a directory structure. Such an optimization is made possible by the comparable cost of local cache accesses with the use of on-chip network resources. Coherency is maintained using lightweight graph structures embedded in the L1 caches. We compare our Proximity Coherence protocol to an existing directory-based MESI protocol using fullsystem simulations of a 32 core system. Our extension lowers the latency of L1 cache load misses by up to 32% while reducing the bytes transferred on the global on-chip interconnect by up to 19% for a range of parallel benchmarks. Employing Proximity Coherence provides execution time improvements of up to 13%, reduces cache hierarchy energy consumption by up to 30% and delivers a more efficient solution to the challenge of coherence in chip multiprocessors.
Copyright ACM, 2010. This is the author's version of the work. It is posted here by permission of ACM for your personal use. Not for redistribution. The definitive version was published in Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques (PACT '10),
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Bibtex format
author = { Nick Barrow-Williams and Chris Fensch and Simon Moore },
title = {Proximity Coherence for Chip Multiprocessors},
book title = {Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques (PACT '10)},
publisher = {ACM},
year = 2010,
month = {Sep},
pages = {123-134},
doi = {10.1145/1854273.1854293},

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