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Title:Power Management in the AMULET Microprocessors
Authors: S. B. Furber ; Aristeidis Efthymiou ; J. D. Garside ; M. J. G Lewis ; D. W. Lloyd ; S. Temple
Date:Mar 2001
Publication Title:IEEE Design and Test of Computers
Publication Type:Journal Article Publication Status:Published
Volume No:18, 2 Page Nos:42-52
DOI:10.1109/54.914617 ISBN/ISSN:0740-7475
Amulet microprocessors are asynchronous (clockless) implementations of the ARM 32-bit RISC architecture. Their asynchronous control framework has positive benefits for low-power applications because it reduces activity to the minimum required to perform a task, whereas a clock inevitably incurs wasteful activity.
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Bibtex format
author = { S. B. Furber and Aristeidis Efthymiou and J. D. Garside and M. J. G Lewis and D. W. Lloyd and S. Temple },
title = {Power Management in the AMULET Microprocessors},
journal = {IEEE Design and Test of Computers},
publisher = {IEEE},
year = 2001,
month = {Mar},
volume = {18, 2},
pages = {42-52},
doi = {10.1109/54.914617},
url = {},

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